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Design of a low-delay 4-bit parallel prefix adder using QCA technology.

Tushar Niranjan1, Anirban Nayak2, Sreehari Veeramachaneni3

  • 1Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani, Hyderabad Campus, Jawahar Nagar, Kapra Mandal, Medchal District, Hyderabad, Telangana, 500078, India.

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Summary
This summary is machine-generated.

This study introduces a novel, low-delay 4-bit Parallel Prefix Adder (PPA) using Quantum Dot Cellular Automata (QCA) technology. The new design offers significant improvements in speed, area, and cell count for high-speed digital circuits.

Keywords:
Parallel prefix adderQCAVLSI

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Area of Science:

  • Digital Electronics
  • Nanotechnology
  • Computer Architecture

Background:

  • Parallel Prefix Adders (PPAs) are crucial for high-speed digital systems.
  • Existing Quantum Dot Cellular Automata (QCA) adders face challenges in efficiency and performance.
  • Optimizing PPA architectures in QCA is essential for advancing digital design.

Purpose of the Study:

  • To present a novel, low-delay 4-bit Parallel Prefix Adder (PPA) implemented using Quantum Dot Cellular Automata (QCA).
  • To enhance existing PPA modules for optimal integration within the core PPA structure.
  • To provide a faster, more compact, and energy-efficient QCA adder alternative.

Main Methods:

  • Implementation of a multilayer PPA circuit using QCA technology.
  • Enhancement of fundamental PPA modules (XOR, Half Adder, Black, Gray).
  • Simulation and analysis using QCADesigner-E Version 2.2 software.

Main Results:

  • Achieved a 26% reduction in cell count, 31% in area, and 57% in delay compared to existing PPA designs.
  • Reduced delay by 25% and area-delay cost by 11% compared to state-of-the-art QCA adders.
  • Demonstrated energy dissipation comparable to existing QCA adder designs.

Conclusions:

  • The proposed 4-bit QCA PPA offers superior performance in terms of speed, area, and cell count.
  • The design presents a practical and efficient solution for high-speed QCA-based digital applications.
  • This work contributes to the advancement of efficient digital circuit design in QCA technology.