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Updated: May 13, 2026

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots
Published on: November 1, 2013
Combining multiplexed gate-based readout and isolated CMOS quantum dot arrays
Pierre Hamonic1, Martin Nurizzo1, Jayshankar Nath2
1Univ. Grenoble Alpes, CNRS, Grenoble INP, Institut Néel, Grenoble, France.
None:
Semiconductor quantum dot arrays are a promising platform to perform spin-based error-corrected quantum computation with large numbers of qubits. However, due to the diverging number of possible charge configurations combined with the limited sensitivity of large-footprint charge sensors, achieving single-spin occupancy in each dot in a growing quantum dot array is exceedingly complex. Therefore, to scale-up a spin-based architecture we must change how individual charges are readout and controlled. Here, we demonstrate single-spin occupancy of each dot in a foundry-fabricated array by combining two methods. 1/ Loading a finite number of electrons into the quantum dot array; simplifying electrostatic tuning by isolating the array from the reservoirs. 2/ Deploying multiplex gate-based reflectometry to dispersively probe charge tunneling and spin states without charge sensors or reservoirs. Our isolated arrays probed by embedded multiplex readout can be readily electrostatically tuned. They are thus a viable, scalable approach for spin-based quantum architectures.
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