Reconfigurable binary and ternary logic devices enabling logic state modulation.

Area of Science:

• Materials Science
• Electrical Engineering
• Computer Engineering

Background:

• Traditional transistors operate in binary mode (0 or 1).
• Ternary logic (0, 1, 2) offers potential for increased computational density.
• Developing reconfigurable transistors for ternary operations is an active research area.

Purpose of the Study:

• To report a novel reconfigurable binary-ternary transistor.
• To demonstrate controllable voltage range and current for intermediate logic states.
• To enable reconfigurability between binary and ternary operations.

Main Methods:

• Utilized an indium-gallium-zinc-oxide channel with a dual-gate structure.
• Incorporated dielectrics with high and low capacitances for an asymmetric structure.
• Connected two dual-gated channels in series, controlling gates for specific functions.

Main Results:

• Achieved adjustable threshold voltage via opposing control gate bias.
• Demonstrated partial depletion leading to control gate voltage-dependent off current.
• Configured device to output three current regions (fully depleted, partially depleted, accumulated) for ternary logic.
• Precisely controlled threshold voltage and intermediate channel current via control gate biasing.

Conclusions:

• The developed transistor successfully operates in both binary and ternary modes.
• The device offers tunable intermediate logic states with adjustable voltage and current.
• This work advances the development of flexible and efficient logic devices.