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Transmission of Multiple Signals through an Optical Fiber Using Wavefront Shaping
Published on: March 20, 2017
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Fully utilized pilot-aided digital signal processing with state pruning MLSD assisted adaptive symbol detection for
Optics Express
|July 30, 2025
Summary
This study introduces a power-efficient digital signal processing (DSP) architecture for high-speed optical interconnects. It significantly reduces complexity and power consumption in symbol-rate sampled systems using pilot-aided processing.
Area of Science:
- Optical Communications
- Digital Signal Processing
- Integrated Circuit Design
Background:
- Symbol-rate sampling in high-speed optical interconnects is crucial for reducing digital signal processing (DSP) power consumption.
- Challenges include sensitivity to analog-to-digital converter (ADC) sampling phase error and signal degradation under Nyquist constraints.
- Existing solutions often struggle with power efficiency and complexity in demanding optical interconnect applications.
Purpose of the Study:
- To propose a hardware-efficient DSP architecture for FTN-shaped 16QAM systems enabling power-efficient, symbol-rate sampled coherent optical interconnects.
- To leverage pilot-aided processing for enhanced carrier recovery and adaptive symbol detection.
- To achieve an optimal balance between bit error rate (BER) and computational complexity.
Main Methods:
- Development of a novel pilot-aided adaptive symbol detection framework (PA-SDF) incorporating state pruning maximum likelihood sequence detection (MLSD).
- Implementation of a polarization-joint misaligned pilot scheme for improved carrier recovery (CR).
- Dynamic switching between single-symbol detection (SSD) and multi-symbol detection (MSD) based on a mode-switching decision metric (MSDM).
Main Results:
- Demonstrated 0.7 dB receiver sensitivity improvement at 80/90/100 Gbaud.
- Achieved over 95% reduction in multiplier and adder usage for the carrier recovery scheme.
- Reduced MLSD complexity to 7.72% of conventional methods, with 74% of symbols processed via low-complexity SSD.
Conclusions:
- The proposed pilot-aided symbol-rate sampling DSP architecture offers a viable solution for next-generation, power-constrained data centers.
- Significant reductions in hardware complexity and power consumption were achieved.
- The architecture effectively addresses the challenges of sensitivity and signal degradation in high-speed optical interconnects.
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