Integrated dispersion compensator based on cascaded silicon micro-ring resonators

Integrated dispersion management holds the key to enabling a diverse range of on-chip ultrafast all-optical signal processing operations in large-scale photonic integrated circuits (PICs). Here, a novel integrated silicon dispersion compensator based on cascading two dual-layer nested micro-ring resonators (MRRs) boasting an impressively large negative dispersion value is proposed. The structure was optimized by employing the finite-difference time-domain (FDTD) method. The numerical results reveal that the maximum group delay and negative dispersion of 266.41 ps and-34611.6 ps/nm, as well as -112.13 ps and -7567.1 ps/nm, were obtained at 1550 nm and 1545 nm, respectively. Meanwhile, the insertion loss (IL) of the device remains below 0.44 dB, and its footprint is only 25 μm × 27 μm. Additionally, the cumulative chromatic dispersion accrued by 40 Gbit/s on-off keying (OOK) signals, following their passage through 100 km of single-mode fiber (SMF), was successfully compensated. The consequent results validate the outstanding performance of the proposed dispersion compensator. The designed device is superior to previously reported results in terms of dispersion and footprint, and shows seamless compatibility with complementary metal-oxide-semiconductor (CMOS) technology, thus harboring great application potential in ultra-high-speed silicon photonic transceiver chips and related fields.