Low-Power Branch CNN Hardware Accelerator with Early Exit for UAV Disaster Detection Using 16 nm CMOS Technology

Area of Science:

• Computer Vision
• Artificial Intelligence
• Hardware Acceleration

Background:

• Disaster monitoring requires efficient and accurate aerial imagery analysis.
• Existing methods often face challenges with computational resources and latency.
• Need for low-power, real-time disaster prediction systems.

Purpose of the Study:

• To develop an efficient disaster detection framework using aerial imagery.
• To enhance feature learning and reduce model parameters with a Branch Convolutional Neural Network (B-CNN).
• To optimize resource usage through weight quantization and early exit mechanisms.

Main Methods:

• Utilized a Branch Convolutional Neural Network (B-CNN) for enhanced feature learning.
• Integrated DoReFa-Net for weight quantization and fixed-point representation.
• Implemented an early exit mechanism for low-latency, energy-efficient predictions.
• Developed a B-CNN hardware accelerator using TSMC 16 nm CMOS technology with power gating.

Main Results:

• The B-CNN hardware accelerator operates at 500 MHz with 37.56 mW power consumption.
• Achieved a disaster prediction accuracy of 88.18%.
• Demonstrated effective training and inference with reduced model parameters.

Conclusions:

• The proposed framework is effective for low-power, real-time aerial disaster monitoring.
• The B-CNN hardware accelerator offers a suitable solution for energy-efficient disaster prediction.
• The system's performance highlights its potential in critical disaster response scenarios.