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Published on: February 29, 2012
0.91 V reference, 3.3 ppm/°C Sub-BGR with second-order compensation and improved PSRR
Chokkakula Ganesh1, Satheesh Kumar S2, A Shanthi3
1Deptartment of Electronics and Communication Engineering, VNR Vignana Jyothi Institute of Engineering and Technology, Hyderabad, India.
This study presents a novel Bandgap Reference (BGR) circuit offering superior temperature stability and process variation tolerance. The optimized design achieves a significantly lower temperature coefficient and improved power supply rejection ratio for analog applications.
Area of Science:
- Electrical Engineering
- Analog Integrated Circuit Design
Background:
- Bandgap Reference (BGR) circuits are fundamental for stable voltage generation.
- Conventional BGR designs face challenges with temperature stability and process variations.
- High-precision applications demand improved performance metrics like temperature coefficient and PSRR.
Purpose of the Study:
- To design and analyze a novel Bandgap Reference (BGR) circuit.
- To enhance temperature stability and minimize process variation effects.
- To achieve superior performance compared to existing BGR topologies.
Main Methods:
- Implementation of a second-order compensation technique.
- Design of an optimized error amplifier and a low-temperature-coefficient resistor network.
- Development of a robust startup mechanism for stable circuit operation under PVT variations.
- Simulation and comparison with conventional CM-BGR, Cascaded CM-BGR, Op-Amp based-BGR, and Sub-BGR.
Main Results:
- Achieved a temperature coefficient of 3.33 ppm/°C (58.97-78.79% reduction).
- Demonstrated 1.12×-6.02× improvement in Power Supply Rejection Ratio (PSRR).
- Showcased 96% improved line regulation with 723 µV variation.
- Validated superior performance over Op-Amp based-BGR and Sub-BGR techniques.
Conclusions:
- The proposed BGR circuit offers significant improvements in temperature stability and process variation tolerance.
- The enhanced performance makes the BGR highly suitable for high-precision analog and mixed-signal applications.
- The design, simulated using 32nm CMOS technology, represents a notable advancement in BGR circuit design.
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