Interface Thermal Resistance in Heterostructures of Micro-Nano Power Devices: Current Status and Future Challenges

As micro-nano power devices have evolved towards high frequency, high voltage, and a high level of integration, the issue of thermal resistance at heterointerfaces has become increasingly prominent, posing a key bottleneck that limits device performance and reliability. This paper presents a systematic review of the current state of research and future challenges related to interface thermal resistance in heterostructures within micro and nano power devices. First, based on phonon transport theory, we conducted an in-depth analysis of the heat transfer mechanisms at typical heterointerfaces, such as metal-semiconductor and semiconductor-semiconductor, and novel low-dimensional materials. Secondly, a comprehensive review of current interface thermal resistance characterization techniques is provided, including the application and limitations of advanced methods such as time domain thermal reflection and Raman thermal measurement in micro- and nano-scale thermal characterization. Finally, in response to the application requirements of semiconductor power devices, future research directions such as atomic-level interface engineering, machine learning-assisted material design, and multi-physics field collaborative optimization are proposed to provide new insights for overcoming the thermal management bottlenecks of micro-nano power devices.