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Updated: Sep 10, 2025

Optimized Fabrication Procedure for High-Quality Graphene-based Moiré Superlattice Devices
Published on: July 11, 2025
Fabrication of High-Quality MoS2/Graphene Lateral Heterostructure Memristors
Claudia Mihai1, Iosif-Daniel Simandan1, Florinel Sava1
1National Institute of Materials Physics, Atomistilor 405A, 077125 Magurele, Romania.
Abstract:
Integrating two-dimensional transition-metal dichalcogenides with graphene is attractive for low-power memory and neuromorphic hardware, yet sequential wet transfer leaves polymer residues and high contact resistance. We demonstrate a complementary metal-oxide-semiconductor (CMOS)-compatible, transfer-free route in which an atomically thin amorphous MoS2 precursor is RF-sputtered directly onto chemical vapor-deposited few-layer graphene and crystallized by confined-space sulfurization at 800 °C. Grazing-incidence X-ray reflectivity, Raman spectroscopy, and X-ray photoelectron spectroscopy confirm the formation of residue-free, three-to-four-layer 2H-MoS2 (roughness: 0.8-0.9 nm) over 1.5 cm × 2 cm coupons. Lateral MoS2/graphene devices exhibit reproducible non-volatile resistive switching with a set transition (SET) near +6 V and an analogue ON/OFF ≈2.1, attributable to vacancy-induced Schottky-barrier modulation. The single-furnace magnetron sputtering + sulfurization sequence avoids toxic H2S, polymer transfer steps, and high-resistance contacts, offering a cost-effective pathway toward wafer-scale 2D memristors compatible with back-end CMOS temperatures.
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