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Wafer Defect Image Generation Method Based on Improved Styleganv3 Network.

Jialin Zou1, Hongcheng Wang1, Jiajin Zhong2

  • 1School of Electrical Engineering and Intelligentization, Dongguan University of Technology, Dongguan 523808, China.

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Summary
This summary is machine-generated.

This study enhances wafer defect image generation using a novel StyleGANv3 framework. The improved model generates high-fidelity images from limited datasets, aiding downstream tasks.

Keywords:
Generative Adversarial Networkdeep learningwafer defect generation

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Area of Science:

  • Semiconductor Manufacturing
  • Artificial Intelligence
  • Computer Vision

Background:

  • High-fidelity wafer defect image generation is crucial but challenging due to limited real-world data.
  • Existing methods often lack physical authenticity and struggle with small datasets.

Purpose of the Study:

  • To develop an enhanced generative model for high-fidelity wafer defect image synthesis.
  • To improve the reconstruction ability of wafer datasets using limited data.
  • To address the challenges of data scarcity and physical authenticity in generative models.

Main Methods:

  • An enhanced StyleGANv3 framework incorporating a Heterogeneous Kernel Fusion Unit (HKFU) for multi-scale feature refinement.
  • Integration of a Dynamic Adaptive Attention Module (DAAM) to enhance discriminator sensitivity.
  • Training and evaluation on the Mixtype-WM38 and MIR-WM811K datasets.

Main Results:

  • State-of-the-art performance achieved on benchmark datasets.
  • FID scores of 25.20 and 28.70, and SDS values of 36.00 and 35.45 demonstrate high-fidelity generation.
  • Successful generation of realistic wafer defect images from limited data.

Conclusions:

  • The proposed method effectively alleviates the problem of limited datasets in generative modeling.
  • The enhanced StyleGANv3 framework contributes significantly to data preparation for wafer defect classification and detection.
  • This work advances the field of synthetic data generation for semiconductor quality control.