Design and test of analog-to-digital converters with enhanced test strategies using built in self test

Analog and Mixed Signal Integrated Circuits (AMS ICs), which have many different components on a single chip, can now be integrated due to technological advancements. However, controllability and observability both decline with increasing circuit complexity, making testing more difficult and expensive. The real time signals are analog in nature and hence ADCs are used to convert them to digital signals for further processing in all the mixed signal circuits. In order to enhance the reliability, a great deal of effort has been devoted in the recent years to test the ADCs. ADC testing is becoming a point of intensive research today. ADCs are deigned and full custom BIST scheme for the fault detection of the ADCs is proposed. This scheme involves a pattern counter, adaptive ramp generator and two stage operational amplifier comparator. This proposed method provides the test outputs in time domain and provides easy ways of determining the presence of errors. The effectiveness of the proposed BIST is tested with four different ADC architectures namely Servo Tracking ADC, Flash ADC,Threshold Invert Quantization (TIQ) Flash ADC and three stage comparator based Servo Tracking ADC. The proposed BIST scheme provides average fault coverage of 95.8% among the four type of ADC tested.