High-Performance Air-Stable Polymer Monolayer Transistors for Monolithic 3D CMOS logics

Area of Science:

• Materials Science
• Organic Electronics
• Nanotechnology

Background:

• Polymer monolayer transistors offer ideal platforms for studying transport phenomena.
• Poor understanding of structure-property relationships limits current polymer monolayer transistor performance.

Purpose of the Study:

• To investigate structure-property relations in polymer monolayers.
• To enhance polymer monolayer transistor performance and stability.
• To explore 3D integration possibilities.

Main Methods:

• Utilized 4D scanning confocal electron diffraction to characterize nanofibrillar microstructures and edge-on orientation.
• Employed a top-gate configuration with CYTOP as the gate dielectric.
• Fabricated and tested polymer monolayer transistors.

Main Results:

• Demonstrated a self-confinement effect in polymer monolayers with specific microstructures and orientation.
• Achieved field-effect mobility of 7.12 cm² V⁻¹ s⁻¹, an on/off ratio of 10⁸, and subthreshold swing of 0.21 V dec⁻¹.
• Exhibited remarkable device stability over 1260 days due to top-gate architecture and morphologic lock effect.
• Enabled monolithic 3D integration with n-type oxide transistors for hybrid complementary inverters.

Conclusions:

• Controlling polymer chain alignment and π-stacking is crucial for high-performance monolayer transistors.
• The developed top-gate architecture significantly improves transistor performance, stability, and facilitates 3D integration.
• This work paves the way for advanced, stable, and integrated organic electronic devices.