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Ultrahigh-precision analog computing using memory-switching geometric ratio of transistors.

Xing-Jian Yangdong1, Cong Wang1, Yichen Zhao1

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This study introduces a novel analog computing chip that uses transistor geometry for ultrahigh precision, overcoming limitations of traditional methods. The new design achieves superior accuracy and stability across various temperatures for artificial intelligence hardware.

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Area of Science:

  • Materials Science
  • Computer Engineering
  • Artificial Intelligence Hardware

Background:

  • Traditional analog computing relies on physical quantities prone to fluctuations, limiting precision.
  • Environmental changes and programming can compromise analog system accuracy.
  • Need for stable and precise analog computation in AI hardware.

Purpose of the Study:

  • To develop an ultrahigh-precision analog computing chip.
  • To shift reliance from fluctuating physical quantities to stable geometric features.
  • To demonstrate a novel analog in-memory computing approach.

Main Methods:

  • Utilized the geometric ratio of transistors instead of intrinsic physical quantities for computation.
  • Developed an analog in-memory computing chip using a standard complementary metal-oxide semiconductor process.
  • Implemented a weight remapping technique to enhance computing accuracy.

Main Results:

  • Achieved the highest precision reported to date in analog computing.
  • Demonstrated ultrahigh computing accuracy with a root mean square error of 0.101% in parallel vector-by-matrix multiplication.
  • Maintained high precision at extreme temperatures (-78.5°C and 180°C) with errors of 0.155% and 0.130%.

Conclusions:

  • Leveraging stable geometric features of devices significantly enhances analog computing precision.
  • The developed chip offers a promising solution for stable and accurate AI hardware.
  • This work advances the field of analog computing by pushing precision boundaries.