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This study introduces a novel deep Reservoir Computing (RC) architecture for neuromorphic hardware. The hardware-friendly design demonstrates strong performance on nonlinear computation and short-term memory tasks.

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Area of Science:

  • Artificial Intelligence
  • Computational Neuroscience
  • Hardware Implementations

Background:

  • Reservoir Computing (RC) models dynamical Recurrent Neural Networks using a fixed recurrent reservoir.
  • Existing RC models face challenges in efficient implementation on neuromorphic hardware.
  • Need for hardware-friendly deep RC architectures for complex learning tasks.

Purpose of the Study:

  • To introduce a novel deep Reservoir Computing neural network design.
  • To develop a strategy suitable for neuromorphic hardware implementations.
  • To address hardware-friendly nonlinearity and noise modeling in reservoir updates.

Main Methods:

  • Proposed a multi-level deep RC architecture with ring reservoir topology.
  • Implemented one-to-one inter-reservoir connections.
  • Incorporated hardware-friendly nonlinearity and noise modeling into reservoir update equations.

Main Results:

  • Demonstrated the hardware-friendly deep RC architecture on electronic hardware.
  • Showcased promising processing capabilities for nonlinear computation and short-term memory tasks.
  • Achieved competitive performance on time-series classification tasks compared to existing RC systems.

Conclusions:

  • The proposed deep RC architecture offers advantages for hardware-friendly environments.
  • The design is effective for machine learning applications requiring nonlinear computation and memory.
  • Highlights the potential of deep, hardware-optimized RC for future AI systems.