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Terahertz Microfluidic Sensing Using a Parallel-plate Waveguide Sensor
Published on: August 30, 2012
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Wafer-scale statistical extraction of parallel waveguide spacing from optical resonant spectra
Optics Letters
|September 16, 2025
Summary
This study introduces a precise method to measure parallel waveguide spacing in photonic integrated circuits. The technique uses channel-ring resonators to map fabrication variations across a wafer, improving chip manufacturing.
Area of Science:
- Photonics
- Integrated Optics
- Materials Science
Background:
- Photonic integrated circuits (PICs) are crucial for modern optical communication and computing.
- Precise control over waveguide spacing is essential for PIC performance but challenging to monitor during fabrication.
- Fabrication variations can significantly impact device functionality and yield.
Purpose of the Study:
- To develop a scalable and accurate method for extracting parallel waveguide spacing in PICs.
- To enable in-line process monitoring and variation-aware modeling in silicon photonics manufacturing.
- To visualize and quantify fabrication-induced variations across a wafer.
Main Methods:
- Design of high-sensitivity channel-ring resonators sensitive to waveguide spacing variations.
- Wafer-scale optical transmission spectra measurements of fabricated resonators.
- Application of a compact model to quantitatively link spectral response to effective waveguide gap.
- Generation of a virtual wafer map correlating resonator position with fabrication variations.
Main Results:
- Successful quantitative extraction of effective waveguide gap with high accuracy.
- Visualization of spatial distribution of fabrication-induced variations using virtual wafer maps.
- Experimental validation across diverse resonator array designs on a silicon photonics platform.
- Demonstration of statistical robustness for reliable process monitoring.
Conclusions:
- The presented method offers a precise and scalable solution for monitoring waveguide spacing in PIC fabrication.
- This approach facilitates in-line process control and supports variation-aware design and modeling.
- It provides a viable pathway to enhance yield and performance in photonic chip manufacturing.

