Update Disturbance-Resilient Analog ReRAM Crossbar Arrays for In-Memory Deep Learning Accelerators

Area of Science:

• Materials Science
• Computer Engineering
• Artificial Intelligence

Background:

• Resistive memory (ReRAM) with crossbar arrays shows promise for analog AI accelerators, enabling in-memory inference and training.
• Current AI acceleration often offloads training to external processors, limiting power efficiency.
• In-memory training acceleration is vital for sustainable AI but faces challenges like weight update disturbances.

Purpose of the Study:

• To address the challenge of weight value disturbances during fully parallel weight updates in analog ReRAM arrays for in-memory training.
• To present a novel ReRAM device solution and demonstrate its capability for disturbance-free parallel weight updates.

Main Methods:

• Developed a ReRAM device using a conductive metal oxide (CMO) on a HfO_x layer with a nanoscale conductive filament on 350 nm silicon technology.
• Analyzed device disturbance tolerance using COMSOL Multiphysics simulations, modeling filament-induced thermoelectric effects.
• Demonstrated disturbance-free parallel weight mapping on a back-end-of-line integrated ReRAM array chip.

Main Results:

• The ReRAM devices exhibit fast (60 ns) non-volatile analog switching.
• Devices show exceptional resilience to update disturbances, withstanding over 100,000 pulses.
• Successful demonstration of disturbance-free parallel weight mapping on a ReRAM array chip.

Conclusions:

• The developed ReRAM technology offers a viable solution for in-memory AI training acceleration.
• The devices' resilience to disturbances and demonstrated parallel update capability are crucial for next-generation AI hardware.
• Hardware-aware neural network simulations confirm the potential for fully parallel weight updates in deep learning accelerators.