In Situ Time-Based Sensor for Process Identification Using Amplified Back-End-of-Line Resistance and Capacitance

Area of Science:

• Electrical Engineering
• Semiconductor Device Physics
• Integrated Circuit Design

Background:

• Direct measurement of on-chip interconnect RC time-constants is challenging due to small values.
• Process authentication requires accurate measurement of integrated circuit characteristics.

Purpose of the Study:

• To develop an in situ time-based sensor for accurate process authentication.
• To overcome the limitations of directly measuring small RC time-constants in chip interconnects.

Main Methods:

• A "three-configuration" measurement approach using auxiliary poly resistors and MIM capacitors.
• Leveraging inherent metal routing within the chip for RC time-constant measurement.
• Developing a straightforward analytical model incorporating parasitic capacitances.

Main Results:

• Reduced measurement error by over 82% compared to direct measurement, with only a 25% area penalty.
• Analytical model showed excellent concurrence with simulations (max 2.6% difference).
• Fabricated sensor variants in 130 nm CMOS showed a maximum error of 6.1% compared to simulations.

Conclusions:

• The proposed time-based sensor effectively authenticates semiconductor manufacturing processes.
• The three-configuration method significantly improves accuracy for measuring small RC time-constants.
• The developed analytical model accurately predicts sensor performance.