High-efficiency wideband all-digital transmitter with fourth-order delta-sigma modulator for mobile fronthaul

This paper presents a high-efficiency, all-digital parallel transmitter implemented on a field-programmable gate array (FPGA), achieving state-of-the-art performance in delta-sigma modulator (DSM) bit efficiency and resource utilization. Two key architectural enhancements are introduced. First, DSM bit efficiency is enhanced by employing a fourth-order DSM with optimized noise transfer function (NTF) zero placement, significantly reducing the required upsampling ratio. Second, a multiplier-efficient parallel architecture improves FPGA resource utilization by increasing the DSM clock frequency by 70% and lowering the number of parallel channels. The transmitter supports real-time generation of 64-/256-/1024-quadrature amplitude modulation (QAM) signals over bandwidths ranging from 1.4 to 2.3 GHz and validates 10 km optical transmission using 25G-class small form-factor pluggable (SFP28) modules. The DSM bit efficiency of 50% achieved represents the highest reported in real-time DSM demonstrations while reducing FPGA resource usage to 57.8% of the original requirement, highlighting its suitability for scalable and cost-effective optical fronthaul applications.