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Optimized NCFET-based approximate multiplier for energy-aware image applications.

Mamidipaka B R Srinivas1, Konguvel Elango2

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This study introduces novel Negative Capacitance FETs (NCFETs) for approximate computing, significantly reducing energy consumption in multipliers. The NCFET-based 8x8 multiplier achieves superior energy efficiency and performance for image processing applications.

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Area of Science:

  • VLSI design and approximate computing
  • Beyond-CMOS technologies
  • Low-power circuit design

Background:

  • High-speed multimedia applications demand error-resilient circuits.
  • CMOS scaling challenges drive exploration of beyond-CMOS technologies like NCFETs.
  • Multipliers are crucial for image processing and AI, necessitating performance enhancements.

Purpose of the Study:

  • To develop highly efficient approximate 4:2 compressors and multiplier circuits.
  • To introduce an 8x8 approximate multiplier using NCFET technology.
  • To reduce energy consumption in approximate computing systems.

Main Methods:

  • Design of approximate 4:2 compressors and an 8x8 multiplier using a 45nm Verilog-A NCFET model.
  • Simulation of circuits operating at a low voltage of 0.5V.
  • Implementation and evaluation of the multiplier for image multiplication using MATLAB.

Main Results:

  • The NCFET 4:2 compressor achieves an energy consumption of 0.122aJ, significantly outperforming CMOS alternatives.
  • The proposed 8x8 approximate multiplier operates at 0.5V, offering substantial power and energy reduction.
  • MATLAB simulations show improved PSNR and MSSIM, surpassing existing approximate multipliers in accuracy and energy efficiency.

Conclusions:

  • NCFET technology offers a promising path for energy-efficient approximate computing.
  • The developed approximate multiplier design significantly enhances performance and reduces energy usage.
  • This work demonstrates the potential of NCFETs for next-generation low-power digital circuits.