High-linearity flash ADC achieved through design-technology co-optimization based on two-dimensional semiconductor

The swift advancement of the Internet of Things (IoT) and the subsequent proliferation of smart devices have precipitated an exponential surge in demand for integrated analog-to-digital converters (ADCs) that exhibit low power consumption and high stability across a broad spectrum of applications. Despite the notable progress witnessed in conventional silicon-based ADCs, they continue to confront constraints pertaining to miniaturization, wearability, and power efficiency-critical parameters for the effective functionality of IoT devices. In recent years, two dimensional semiconductors (2DSCs) have attracted notable interest in low-power circuitry and flexible electronics due to their intrinsically atomic-scale thickness and exceptional electrical properties. However, integrating 2DSCs into analog circuits poses substantial challenges, especially in the context of complex mixed-signal circuits. The divergent design requirements for digital and analog circuits also complicate the achievement of high-performance ADCs on a single chip. This paper presents an innovative 3-bit Flash ADC circuit utilizing 2DSCs. Through the synergistic optimization of materials, fabrication processes, and circuit design, the nonlinearity of the ADC is significantly reduced, resulting in a differential nonlinearity (DNL) of 0.072 least significant bit (LSB), an integral nonlinearity (INL) of 0.128 LSB, and a remarkably low power consumption of only 3.36 μW.