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Reduction Method for a Network-on-Chip Low-Level Modeling.

Evgeny V Lezhnev1, Aleksandr Y Romanov1, Dmitry V Telpukhov2

  • 1HSE University, 101000 Moscow, Russia.

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Summary

This study introduces a method to simplify low-level network-on-chip (NoC) modeling by using data packet generators. This approach enhances simulation scalability and speeds up analysis of NoC routing algorithms.

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HDLRTLcomputer-aided design (CAD)modelingnetwork-on-chip (NoC)

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Area of Science:

  • Computer Engineering
  • VLSI Design
  • Network-on-Chip Architectures

Background:

  • Low-level modeling of Networks-on-Chip (NoCs) is crucial for performance analysis and design optimization.
  • Existing NoC modeling methods can be computationally intensive, limiting the scale and speed of simulations.
  • Efficient modeling is essential for evaluating routing algorithms and network synthesis resource costs.

Purpose of the Study:

  • To propose a method for reducing the complexity of low-level NoC models.
  • To enhance the scalability and simulation speed of NoC modeling tools.
  • To facilitate the analysis of NoC routing algorithms and network synthesis.

Main Methods:

  • Replacing real IP blocks with a data packet generator module in the low-level NoC model.
  • Implementation of the proposed method in the HDLNoCGen ECAD tool.
  • Development of a universal interface for connecting new components with reduced resource costs and configuration time.

Main Results:

  • Significant increase in the maximum number of nodes in simulated NoCs.
  • Accelerated modeling process, enabling faster analysis.
  • Effective investigation of resource costs for network synthesis.
  • Demonstrated effectiveness in analyzing routing algorithms across various NoC topologies.

Conclusions:

  • The proposed low-level NoC modeling methodology significantly improves simulation efficiency and scalability.
  • The universal interface reduces overhead for integrating new components.
  • This approach provides a powerful tool for analyzing NoC communication subsystems and optimizing network design.