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Published on: February 3, 2021
Hybrid cryptographic approach for strengthening IoT and 5G/B5G network security
Aman Kumar1, Prashutosh Singh1, Dhananjay Pandurang Kamble1
1School of Electronics Engineering, Vellore Institute of Technology, Vellore, 632014, Tamil Nadu, India.
None:
The rapid evolution of fifth-generation (5G) and beyond (B5G) networks has introduced significant security challenges, necessitating advanced cryptographic mechanisms to protect sensitive data during transmission. Traditional encryption models often struggle to balance security, computational efficiency, and adaptability to dynamic network conditions. This study proposes a novel hybrid cryptographic framework integrating the Advanced Encryption Standard (AES), Data Encryption Standard (DES), and Rivest-Shamir-Adleman (RSA) algorithms. AES and DES provide high-speed symmetric encryption for efficient data protection, while RSA enables secure key exchange and authentication. The integration of dynamic round keys enhances encryption complexity, improving resistance to cryptanalytic attacks. Performance evaluations, including encryption and decryption time analysis, data expansion metrics, and throughput assessments, demonstrate that the proposed framework achieves an optimal balance between security and computational overhead. Benchmark comparisons with traditional and post-quantum cryptographic models highlight the superior efficiency and reduced data expansion of the hybrid approach. Furthermore, practical implementation on ESP32 hardware confirms the model's feasibility for real-time encryption in resource-constrained environments typical of 5G applications. This scalable and flexible encryption paradigm addresses current and emerging security requirements in high-speed wireless networks, with future work focusing on integration with quantum-resistant cryptographic mechanisms to enhance resilience against evolving cyber threats. Experimental results show that the hybrid model achieves up to 30% higher throughput, 10-15% lower data expansion, and reduced encryption/decryption time compared to baseline algorithms, with successful ESP32 implementation and 100% decryption accuracy for key sizes up to 128 bits.
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