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Transistor-Level Activation Functions via Two-Gate Designs: From Analog Sigmoid and Gaussian Control to Real-Time

Junhyung Cho1, Youngmin Han2, Won Woo Lee1

  • 1Department of Artificial Intelligence Semiconductor Engineering, Hanyang University, 222 Wangsimni-ro, Seoul, 04763, Republic of Korea.

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Summary
This summary is machine-generated.

New transistors enable tunable analog activation functions for energy-efficient artificial intelligence (AI) hardware. These devices precisely control sigmoid and Gaussian functions, improving AI model accuracy and reducing power consumption.

Keywords:
Gaussian activation functionanti‐ambipolar transistorhardware applicationmultilayer perceptronprediction of changescreen gate structuresigmoid activation function

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Area of Science:

  • Neuromorphic Engineering
  • Solid-State Devices
  • Artificial Intelligence Hardware

Background:

  • Energy-efficient artificial intelligence (AI) hardware relies on tunable analog activation functions.
  • Existing solutions often lack precise control over activation function parameters.

Purpose of the Study:

  • To introduce novel transistor designs for tunable analog activation functions.
  • To demonstrate device-level control over sigmoid and Gaussian function parameters.
  • To validate the system-level performance of these transistors in AI hardware.

Main Methods:

  • Development of sigmoid-like activation function transistors (SA-transistors) and Gaussian-like activation function transistors (GA-transistors) using a screen gate structure.
  • Precise tuning of activation function parameters (slope, saturation, amplitude, standard deviation) via screen gate voltage.
  • Integration of transistors into a hardware-based multilayer perceptron (MLP) for system-level validation.

Main Results:

  • SA-transistors and GA-transistors demonstrated precise and continuous tunability of analog activation parameters.
  • Improved lung MRI classification accuracy from 77% to 84% using SA-transistors.
  • Enhanced time-series forecasting R² from 0.82 to 0.93 using GA-transistors.
  • Achieved 96.7% accuracy on the IRIS dataset using a hardware-based MLP.

Conclusions:

  • Tunable analog activation transistors offer a pathway to hardware-optimized neural computations.
  • These devices enable neuromorphic accelerators with reduced circuit complexity and power consumption.
  • System-level validation confirms the potential for high classification fidelity without digital post-processing.