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SPICE compact model of silicon avalanche sharpening device: Design and verification
S T Zhang1, J Y Han1, R H Sun1
1College of Advanced Interdisciplinary Studies, National University of Defense Technology, Changsha 410073, China.
None:
This paper presents a physics-based SPICE compact modeling methodology for Silicon Avalanche Sharpening (SAS) diodes, addressing a critical gap in the design of high-power ultra-wideband microwave systems. First, a physical model was established using actual device parameters. Semiconductor simulations revealed that, under a fast-rising (2.25 kV/ns) high-voltage triggering pulse, the dynamic breakdown voltage reaches 1.8 times of the static value. Carrier concentration analysis elucidated the delayed breakdown mechanism. Subsequently, an equivalent circuit model for the base region was developed based on bipolar carrier diffusion theory, followed by the implementation of a SPICE compact model incorporating conductivity modulation effects. The key findings demonstrate excellent agreement between the compact model and physical simulations, with dynamic breakdown voltage deviation less than 5%. Experimental validation further confirms the model's predictive accuracy, showing less than 3% deviation in dynamic breakdown voltage. The proposed model offers a reliable tool for efficient SAS-based circuit simulation and provides critical guidance for engineering applications in high-power microwave systems.
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