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    This study introduces a hardware-in-the-loop (HIL) system for testing camera-based medical devices like Video Capsule Endoscopy (VCE). The FPGA-based HIL system verifies device functionality and error detection in real-time before clinical trials.

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    Area of Science:

    • Biomedical Engineering
    • Medical Imaging
    • Embedded Systems

    Background:

    • Intelligent, camera-based in-body medical devices require rigorous verification.
    • Video Capsule Endoscopy (VCE) is a key technology in gastrointestinal diagnostics.
    • Existing verification methods may not adequately address real-time performance and error detection for complex devices.

    Purpose of the Study:

    • To present a novel hardware-in-the-loop (HIL) verification system for intelligent, camera-based in-body medical devices.
    • To demonstrate the system's efficacy using a Video Capsule Endoscopy (VCE) prototype.
    • To validate the system's capability for real-time performance and automatic error identification.

    Main Methods:

    • Development of a field-programmable gate array (FPGA)-based HIL verification system.
    • Simulation of gastrointestinal (GI) tract traversal by injecting pre-recorded VCE images.
    • Integration and testing with a VCE prototype to assess real-time requirements and error detection.

    Main Results:

    • The HIL system successfully met the real-time operational requirements of the VCE prototype.
    • The system demonstrated the capability for automatic identification of errors during simulated use.
    • The FPGA-based approach proved effective in simulating complex in-body device scenarios.

    Conclusions:

    • The developed HIL system provides a robust platform for verifying camera-based in-body medical devices.
    • This verification approach facilitates the integration of machine learning (ML) hardware accelerators in medical devices.
    • The system enables pre-clinical testing and validation, enhancing device reliability and safety.