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Related Concept Videos

Semiconductors01:22

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There is variation in the electrical conductivity of materials - metals, semiconductors, and insulators that are showcased with the help of the energy band diagrams.
Metals such as copper (Cu), zinc (Zn), or lead (Pb) have low resistivity and feature conduction bands that are either not fully occupied or overlap with the valence band, making a bandgap non-existent. This allows electrons in the highest energy levels of the valence band to easily transition to the conduction band upon gaining...
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In most substances, the current flow is proportional to the voltage applied to it. A simple relationship between the values of current, voltage, and resistance is known as Ohm's law. Nonohmic devices do not exhibit a linear relationship between voltage and current. One such device is the semiconducting circuit element known as a diode. A diode is a circuit device that allows current flow in only one direction.
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Updated: Jan 9, 2026

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Efficient total ionizing dose-aware standard cell characterization methodology for path-level timing performance in

Lomash Chandra Acharya1, Khoirom Johnson Singh2, Neha Gupta1

  • 1Microelectronics and VLSI Group, Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee, Roorkee, Uttarakhand 247667, India.

Nanotechnology
|December 9, 2025
PubMed
Summary

This study introduces a novel method for characterizing standard cells in nanoscale CMOS circuits, accounting for Total Ionizing Dose (TID) effects. The approach ensures accurate timing predictions in radiation environments, enhancing digital circuit reliability.

Keywords:
TID-aware delay dataTID-aware timing closurenanoscale CMOSstandard cell characterizationtotal ionizing dose (TID)variation-aware timing model

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Area of Science:

  • Electrical Engineering
  • Materials Science
  • Computer Engineering

Background:

  • Nanoscale CMOS technology faces reliability challenges in radiation-rich environments.
  • Standard cell libraries lack Total Ionizing Dose (TID) effect characterization.
  • TID degrades transistor parameters, causing timing inaccuracies in critical applications.

Purpose of the Study:

  • To develop an efficient, TID-aware standard cell characterization methodology.
  • To generate radiation-resilient cell characterization data in Liberty format.
  • To enable accurate timing closure prediction under TID influence without SPICE overhead.

Main Methods:

  • Utilized 32 nm Synopsys© Sentaurus TCAD simulations for TID effect modeling.
  • Employed variation-aware analytical timing models to capture radiation-induced degradation.
  • Adjusted BSIM parameters in cell netlists to create pre- and post-radiation libraries.

Main Results:

  • Achieved accurate path-level timing predictions for reference designs under radiation.
  • Reduced SPICE simulation effort by approximately 81.25%.
  • Generated TID-aware standard cell libraries in Liberty format.

Conclusions:

  • The proposed methodology provides a practical solution for radiation-resilient digital IC design.
  • Bridged device-level radiation effects with cell-level timing abstraction.
  • Ensures robust digital circuit performance in harsh environments like aerospace and nuclear electronics.