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Reducing Line Loss

Reducing Line Loss

In a three-phase circuit, line loss is an indicator of energy dissipated as heat due to the resistance of transmission lines. To address this, incorporating transformers into the system—a step-up transformer at the source and a step-down transformer at the load—is a strategic solution. Two three-phase transformers are introduced to improve this.
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Measurement of Quantum Interference in a Silicon Ring Resonator Photon Source

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Performance improvement of all-optical programmable logic array chip with loss-optimized silicon waveguides.

Xiaoyan Gao, Wentao Gu, Jianji Dong

|December 19, 2025

Summary

This summary is machine-generated.

Silicon-based all-optical programmable logic arrays (PLAs) enable optical computing. Optimizing waveguide design significantly improves the performance of canonical logic units (CLUs), paving the way for high-speed optical processors.

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Area of Science:

Photonics and Optical Computing
Integrated Optics
Semiconductor Device Physics

Background:

Programmable logic arrays (PLAs) utilizing canonical logic units (CLUs) are key for reconfigurable optical digital computing.
Silicon-based all-optical PLA chips offer high speed and CMOS compatibility, making them attractive for practical applications.

Purpose of the Study:

To investigate and optimize the output performance of silicon-based all-optical PLA chips.
To analyze the impact of linear scattering and nonlinear absorption losses on CLU performance.
To enhance extinction ratio (ER) and output power of CLUs through waveguide geometry optimization.

Main Methods:

Development of a comprehensive theoretical model to analyze optical losses in CLUs.
Optimization of ridge waveguide parameters (width, length, bending geometry) to minimize losses.
Fabrication of a monolithic PLA chip integrating delay interferometers (DIs) and nonlinear waveguides with co-optimized geometry.

Main Results:

Theoretical optimization of waveguide geometry yielded improvements of 4.71 dB in ER and 4.92 dB in output power for CLUs compared to conventional designs.
Fabrication successfully produced a monolithic PLA chip with high-quality 50 Gb/s CLUs.
Demonstrated implementation of reconfigurable logic functions via selective power coupling among CLUs.

Conclusions:

Optimized waveguide design is crucial for mitigating losses and enhancing the performance of silicon-based all-optical PLA chips.
The developed all-optical PLA chip demonstrates potential as a high-speed all-optical digital processor.
This work contributes to advancing optical signal processing and computing systems.