Native GaN/GaO_x Heterostructure Platform for Wafer-Scale Integration of High-Performance Complementary Transistors

The drive for complementary transistors with ultra-steep subthreshold swing (SS) and minimal power consumption has intensified interest in integrating low-dimensional semiconductors with wide-bandgap materials, as silicon scaling approaches its physical limits in the post-Moore era. A central bottleneck, however, lies in dielectric/semiconductor interface engineering: existing strategies based on van der Waals transfer or nonnative dielectric deposition compromise interface quality, wafer-scale uniformity, and process compatibility, preventing practical large-scale integration. Here, we demonstrate a previously unexplored in situ oxidation strategy that directly forms a high-κ gallium oxide (GaO_x) dielectric on heavily doped n-type gallium nitride (GaN) substrates, enabling high-performance, energy-efficient complementary inverters based on n-type molybdenum disulfide (MoS₂) and p-type carbon nanotube transistors. Leveraging the excellent dielectric properties of the GaN/GaO_x heterostructure, MoS₂ field-effect transistors achieve an interface trap density of 1.18 × 10¹¹ cm^-2 eV^-1, an SS at the thermionic limit of 60 mV dec^-1, an on/off ratio above 10⁸ at 0.87 V, and a voltage gain of 134.5 at 2 V for inverters. These results establish GaN/GaO_x as a native, scalable, and complementary metal-oxide-semiconductor-compatible integration platform, offering a transformative route toward wafer-scale, low-power electronics in the post-Moore era.