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Modeling and simulation of ZnO-based TFTs by dielectric engineering and temperature analysis for enhanced performance
Pranaw Kumar1, Syed Sadique Anwer Askari2, Mukul Kumar Das3
1Department of Electronics Engineering, IIT (ISM), Dhanbad, 826004, India.
This study models zinc oxide (ZnO) thin-film transistors (TFTs), optimizing performance with Hafnium oxide (HfO₂) dielectrics for analog applications. Performance degrades at high temperatures due to increased trap effects.
Area of Science:
- Semiconductor Device Physics
- Materials Science
Background:
- Thin-film transistors (TFTs) are crucial for electronic devices.
- Zinc oxide (ZnO) is a promising material for TFTs due to its properties.
- Understanding the analog performance of ZnO TFTs is essential for device optimization.
Purpose of the Study:
- To model and simulate ZnO-based TFTs.
- To investigate the impact of gate dielectric material, thickness, and operating temperature on TFT performance.
- To optimize ZnO TFTs for high-performance analog and optoelectronic applications.
Main Methods:
- Device modeling and simulation of ZnO TFTs.
- Experimental validation of the device model.
- Systematic analysis of electrical parameters (ID, µFE, SS, VTh, Ion/Ioff) under varying conditions.
- Temperature-dependent analysis to understand performance degradation.
Main Results:
- The developed ZnO TFT model showed strong agreement with experimental data.
- Hafnium oxide (HfO₂) demonstrated superior performance among tested dielectrics (SS = 0.396 V/dec, VTh = 0.49 V, µFE = 53.2 cm²/V·s).
- Optimized HfO₂ (120 nm) yielded enhanced characteristics: µFE = 54.2 cm²/V·s, VTh = 0.27 V, SS = 0.315 V/dec, Ion/Ioff ≈ 10¹¹.
- Device performance decreased at temperatures above 400 K due to trap effects and Fermi-level shifts.
Conclusions:
- ZnO TFTs, particularly with optimized HfO₂ dielectrics, show significant potential for high-performance analog and optoelectronic applications.
- Optimal performance is achieved at room temperature.
- The study provides a validated model and insights into parameter optimization for circuit designers.
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