Pruning random resistive memory for optimizing analog AI.

Area of Science:

• Artificial Intelligence
• Computer Engineering
• Materials Science

Background:

• Growing AI models increase energy demands, prompting research into efficient computing.
• Analog in-memory computing with resistive memory presents an energy-saving solution but faces programming and device challenges.

Purpose of the Study:

• To develop a software-hardware co-design for training resistive-memory neural networks.
• To address programming challenges and device non-idealities in analog in-memory computing.
• To enhance energy efficiency and accuracy in AI hardware.

Main Methods:

• Proposing a software-hardware co-design approach for training randomly weighted resistive-memory neural networks.
• Utilizing edge-pruning topology optimization to tailor network architecture.
• Leveraging resistive-memory electroforming stochasticity for random weight generation.
• Implementing the co-design on a 40 nm resistive memory chip.

Main Results:

• Achieved accuracy improvements of 17.3% (Fashion-MNIST) and 19.9% (Spoken Digit).
• Secured a 9.8% precision-recall AUC improvement on DRIVE.
• Reduced energy consumption by up to 99.7% across tasks.
• Demonstrated applicability across analog memory types and scalability to complex models like ResNet-50.

Conclusions:

• The proposed software-hardware co-design effectively trains energy-efficient resistive-memory neural networks.
• This approach enhances robustness to device variations and reduces programming overhead.
• The method shows significant potential for advancing low-power AI hardware and analog computing.