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Related Experiment Video

Updated: Jan 21, 2026

A Real-world What-Where-When Memory Test

A Real-world What-Where-When Memory Test

Published on: May 16, 2017

In-memory analog computing for non-negative matrix factorization.

Shiqing Wang^1,2, Yubiao Luo^1,2, Pushen Zuo^1,2

¹Institute for Artificial Intelligence, Peking University, Beijing, China.

Nature Communications

|January 19, 2026

Summary

This summary is machine-generated.

We developed an in-memory analog solver for non-negative matrix factorization (NMF) that drastically improves speed and energy efficiency. This novel approach overcomes digital hardware limitations for large-scale NMF tasks.

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Area of Science:

Analog computing
Matrix factorization
Hardware acceleration

Background:

Non-negative matrix factorization (NMF) is crucial for analyzing high-dimensional data in fields like recommender systems and bioinformatics.
Digital hardware faces challenges with NMF's computational demands and memory requirements, limiting scalability.

Purpose of the Study:

To introduce an efficient in-memory analog NMF solver.
To address the limitations of conventional digital hardware for large-scale NMF computations.

Main Methods:

Developed a reconfigurable analog circuit using the generalized inverse principle and conductance compensation.
Integrated the alternating non-negative least squares algorithm for efficient factorization.
Minimized operational amplifiers to reduce power consumption.

Main Results:

Achieved high accuracy in NMF tasks like image compression and recommender systems.
Demonstrated orders-of-magnitude improvements in speed and energy efficiency compared to FPGA and GPU solvers.
Validated the effectiveness of the analog NMF solver in real-world applications.

Conclusions:

The proposed analog NMF solver offers a powerful solution for real-time, large-scale NMF.
Analog matrix computing shows significant potential for advancing NMF applications.
This technology can overcome existing hardware bottlenecks in complex data analysis.