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Inverters with Different Load Configurations and a Two-Input Multiplexer Based on IGZO NMOS TFTs
Isai S Hernandez-Luna1, Jimena Quintero2, Arturo Torres-Sanchez1
1Centro de Nanociencias y Micro y Nanotecnologías, Instituto Politécnico Nacional, Ciudad de México 07738, Mexico.
Abstract:
Amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) have emerged as promising candidates for next-generation large-area and low-power electronics due to their high mobility, low leakage current, and compatibility with low-temperature fabrication on flexible or transparent substrates. In this work, we report the fabrication of bottom-gate a-IGZO NMOS TFTs using HfO2 as high-k gate dielectric and Mo top contacts. The devices were electrically characterized through capacitance-voltage (C-V) and current-voltage (I-V) measurements, from which key parameters were extracted. Based on these transistors, we designed, fabricated, and characterized inverters employing four different load configurations: resistive, diode, depletion, and pseudo-CMOS. A comparative analysis was performed in terms of voltage transfer characteristics (VTCs), gain, and noise margins, highlighting that depletion-load inverters offer the highest gain and robust noise margins. Finally, a two-channel multiplexer was designed and fabricated. The multiplexer was characterized under both square and sinusoidal input signals up to 1 kHz, demonstrating correct channel selection and robust switching behavior. These results confirm the potential of a-IGZO TFT-based circuits as building blocks for low-power and high-reliability digital and mixed-signal electronics.
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