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Evaluation of TRNG Bit Distribution via Stable Entropy Source Synchronization on FPGA.

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Area of Science:

  • Hardware Security
  • Random Number Generation
  • Digital Circuit Design

Background:

  • Unstable input signals to XOR gates in ring oscillator (RO)-based random number generators (RNGs) can lead to biased bit distributions.
  • Previous research highlighted the impact of signal instability on the randomness of generated sequences.

Purpose of the Study:

  • To investigate the correlation between the number of delay flip-flops (D-FFs) and the bit distribution of random number sequences from RO-based RNGs.
  • To analyze the effect of combining biased and metastable signals via XOR gates on overall bit distribution.
  • To evaluate the efficacy of multi-D-FFs as synchronization circuits for RO signals in RNGs.

Main Methods:

  • Simulated the impact of combining signals with varying distributions (including metastable states) through XOR gates.
  • Proposed and analyzed the use of multiple D-FFs as synchronization circuits for RO signals.
  • Estimated metastable output conditions and performed NIST SP 800-22 tests on RO-based RNG implementations.

Main Results:

  • Combining signals with biased distributions through XOR gates affects the overall bit distribution.
  • The inclusion of three-state signals, incorporating metastable states, was simulated.
  • Inserting two or more D-FFs after RO signals demonstrably improves the bit distribution of RO-based RNGs.

Conclusions:

  • Multi-D-FFs serve as effective synchronization circuits for RO signals in RNG applications.
  • The number of D-FFs post-RO is a critical factor in achieving uniform bit distribution.
  • Implementing at least two D-FFs after ring oscillators is recommended for enhanced random number generator performance.