Design of a Bandgap Reference with a High PSRR and Strong Load-Driving Capability

This paper introduces an enhanced bandgap reference (BGR) design, addressing the shortcomings of traditional circuits, such as significant temperature drift, limited power-supply rejection, and inadequate load-driving capacity. The proposed design incorporates a symmetric folded common-emitter-common-base BJT amplifier with MOS-assisted biasing, employed in the proposed BGR, enforcing branch voltage symmetry to effectively suppress intrinsic offset caused by structural mismatch. By reducing the amplifier input offset, the circuit achieves improved reference voltage stability, a lower temperature coefficient (TC), and an enhanced power-supply rejection ratio (PSRR). Additionally, a negative-feedback adaptive current-adjustment driver is implemented to dynamically adjust the output current in response to real-time load changes. This method bolsters the load-driving capability and maintains a stable reference output across varying load conditions. The circuit was simulated using a 0.18 μm BCD process, revealing that with a 3.3 V supply voltage, the BGR produces a stable output voltage of 2.5 V, with a TC of 2.372×10-6 °C^-1. The simulated PSRR is -114.2 dB at DC and -62.07 dB at 1 kHz. Moreover, under a 3.3 V supply, sweeping the load capacitance from 0.1 μF to 100 μF demonstrates that the reference voltage remains consistently regulated at 2.5 V, confirming its excellent load tolerance and output stability.