A Weighted NBTI/HCD Coupling Model in Full VG/VD Bias Space with Applications to SRAM Aging Simulation

Area of Science:

• Semiconductor device physics
• Integrated circuit reliability
• Nanoscale electronics

Background:

• Negative Bias Temperature Instability (NBTI) and Hot Carrier Degradation (HCD) are key aging mechanisms in semiconductor devices.
• Accurate modeling of these phenomena is crucial for predicting the long-term reliability of Static Random-Access Memory (SRAM) circuits.

Purpose of the Study:

• To develop a coupled NBTI/HCD failure model for SRAM aging simulation.
• To establish revised degradation models for NBTI and HCD based on physical mechanisms.
• To create a 2-D voltage plane model incorporating coupling effects, AC effects, and saturation behavior.

Main Methods:

• Developed revised threshold voltage shift (∆Vth) degradation models for NBTI and HCD using reaction-diffusion and hot carrier energy-driven theories.
• Constructed a coupled NBTI/HCD model on a 2-D {V_G, V_D} voltage plane with a power-law weighting factor.
• Incorporated AC effects and long-term saturation into the model.

Main Results:

• The model shows an average relative error of 11.6% compared to experimental data for ∆Vth.
• SRAM circuit simulations indicate maximum absolute errors of 4.2% for Read Static Noise Margin (RSNM) and 3.1% for Write Static Noise Margin (WSNM).

Conclusions:

• The proposed coupled NBTI/HCD model provides accurate predictions for SRAM circuit aging.
• This research offers a valuable tool for reliability simulation of nanoscale integrated circuits.