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Large-Scale Dual-Channel WSe2 Reconfigurable Field-Effect Transistors with Charge-Trapping Layer for 2T TCAM and
Eunyeong Yang1, Jiwon Ma1, Changwook Lee1
1Department of System Semiconductor Engineering and Department of Materials Science and Engineering, Yonsei University, Seoul 03722, Republic of Korea.
Abstract:
Reconfigurable field-effect transistors (RFETs), which allow postfabrication switching of device polarity, are promising candidates for compact and functionally flexible circuit design. Here, we demonstrate large-scale dual n-/p-channel RFETs based on homogeneous monolayer WSe2, integrated with a charge-trapping layer. Ambipolar transport is achieved by forming parallel n- and p-type conduction paths through selective doping. In addition, a multilayer gate dielectric stack (hBN/HfO2/Al2O3) enables complete nonvolatile switching between n- and p-type modes via charge-trapping. Exploiting this reconfigurability, we realize ternary content-addressable memory using only two RFETs (2T) per cell, where polarity combinations encode the three logic states ('0', '1', and 'X'). Furthermore, a full set of Boolean logic gates─including AND, OR, NAND, and NOR, is demonstrated using series and parallel 2T configurations. These results establish dual n-/p-channel WSe2 RFETs as scalable and functionally versatile building blocks for programmable logic and memory in future computing architectures.
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