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Related Concept Videos

Biasing of Metal-Semiconductor Junctions01:27

Biasing of Metal-Semiconductor Junctions

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Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
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There is variation in the electrical conductivity of materials - metals, semiconductors, and insulators that are showcased with the help of the energy band diagrams.
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Design Example: Capacitance Multiplier Circuit01:20

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The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
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MOSFET: Enhancement Mode01:22

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Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
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Singularity Functions for Shear01:26

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In structural analysis, singularity functions are crucial in simplifying the representation of shear forces in beams under discontinuous loading. These functions describe discontinuous  variations in shear force across a beam with varying loads by using a single mathematical expression, regardless of the complexity of the loading conditions. The singularity functions are derived from creating a free-body diagram of the beam and then making conceptual cuts at specific points to examine the...
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Adjoint shape optimization and experimental demonstration of silicon-based 1 × 2 mode splitter.

Weifeng Jiang, Zhongcheng Yang, Tao Chen

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    We developed a compact silicon mode splitter using adjoint optimization for efficient TE0 and TE1 mode separation. This device offers a low-loss solution for on-chip optical communication systems.

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    Area of Science:

    • Photonics
    • Integrated Optics
    • Nanotechnology

    Background:

    • Conventional mode splitters often suffer from large footprints and limited bandwidth.
    • Efficient separation of transverse electric (TE) modes is crucial for advanced optical communication.

    Purpose of the Study:

    • To propose and experimentally demonstrate an ultra-compact silicon-based mode splitter.
    • To achieve efficient TE0 and TE1 mode separation with preserved mode order.

    Main Methods:

    • Adjoint-based shape optimization was employed to design the device.
    • A silicon-silica structure was fabricated within a 5.5 µm × 4 µm functional area.

    Main Results:

    • The mode splitter demonstrated an operating bandwidth exceeding 130 nm.
    • Insertion loss was below 2.5 dB, and crosstalk was under -10 dB.

    Conclusions:

    • The proposed ultra-compact mode splitter offers a flexible, low-loss solution for on-chip mode-division multiplexing.
    • Inverse design enables high integration density and enhanced performance for optical systems.