Opto-electronic simulation of silicon waveguide integrated single photon avalanche diodes.

Area of Science:

• Photonics and Semiconductor Device Physics
• Integrated Optics
• Quantum Technologies

Background:

• Single-photon avalanche diodes (SPADs) are explored as a CMOS-compatible, room-temperature alternative to cryogenic detectors for integrated photonics.
• Existing detectors often require cryogenic cooling, limiting practical applications.
• Photonic integrated circuits (PICs) offer a platform for miniaturization and scalability.

Purpose of the Study:

• To develop and present a comprehensive optoelectronic multiphysics simulation framework for waveguide-integrated SPADs.
• To establish a scalable methodology for design technology co-optimization (DTCO) of SPADs within PICs.
• To identify key areas for performance enhancement, particularly in reducing dark count rate (DCR).

Main Methods:

• Development of an optoelectronic multiphysics simulation framework.
• Modeling of waveguide-integrated SPADs based on imec's isipp50G technology.
• Simulation of device performance, including photon detection efficiency (PDE) and dark count rate (DCR).

Main Results:

• Simulated devices demonstrate the potential for peak photon detection efficiencies (PDE) exceeding 75% at 600 nm when coupled with a SiN waveguide.
• The simulation framework enables the exploration of design parameters for performance optimization.
• Critical pathways for DCR reduction were identified, crucial for practical quantum photonic applications.

Conclusions:

• The developed simulation framework provides a scalable DTCO methodology for integrated SPADs.
• High PDE is achievable with current technology, highlighting the potential of waveguide-integrated SPADs.
• Further optimization focusing on DCR reduction is essential for advancing SPAD integration in quantum photonic circuits.