Virtualization as a New Scaling Law for Semiconductor Devices Beyond Geometric Scaling

Area of Science:

• Semiconductor manufacturing
• Materials science
• Artificial intelligence

Background:

• Moore's Law is approaching physical and economic limits.
• Traditional semiconductor development relies heavily on costly and time-consuming physical iteration (fabrication, testing, qualification).

Purpose of the Study:

• To propose Artificial Intelligence (AI) as a complementary scaling law for semiconductor progress through virtualization.
• To explore how trustworthy virtual evidence can replace physical processes across the semiconductor device lifecycle.

Main Methods:

• Virtualization in design and modeling using surrogate and physics-informed learning, inverse design, and uncertainty-aware exploration.
• Virtualization in fabrication and packaging leveraging digital twins, virtual metrology, and reinforcement learning.
• Virtualization in qualification through defect inference and reliability modeling for early risk detection.

Main Results:

• AI-driven virtualization offers a new pathway for semiconductor scaling beyond geometric limits.
• Virtual evidence, when trustworthy, can significantly reduce the need for physical fabrication, testing, and qualification.
• Specific AI techniques are identified for each stage of the semiconductor lifecycle to enable virtualization.

Conclusions:

• Future semiconductor innovation hinges on the fidelity, integration, and stewardship of virtual evidence, complementing traditional geometric scaling.
• Establishing trust, managing uncertainty, ensuring cross-stage coherence, and addressing sustainability and governance are critical boundary conditions for successful virtualization.
• AI-powered virtualization represents a paradigm shift, enabling more efficient and sustainable semiconductor development.