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Organic Multithreshold Voltage Transistors Constructed via Coplanar Self-Assembled Monolayers.

Hongquan Yu1,2, Xinyu Wen1,2, Shikai Deng1,2,3

  • 1State Key Laboratory of Transducer Technology & 2020 X-Lab, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China.

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Summary
This summary is machine-generated.

Multivalued logic (MVL) transistors are realized using a single p-type organic semiconductor and self-assembled monolayers (SAMs). This approach enhances device stability and simplifies fabrication for advanced information processing.

Keywords:
multithreshold voltage transistorsorganic field-effect transistors (OFETs)self-assembled monolayers (SAMs)surface modificationternary inverter

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Area of Science:

  • Organic electronics
  • Semiconductor device physics
  • Materials science

Background:

  • Multivalued logic (MVL) is crucial for post-Moore computing, aiming to increase information density and reduce complexity.
  • Conventional MVL devices rely on p-n heterojunctions, but n-type organic semiconductors (OSCs) exhibit poor ambient stability, limiting reliability.
  • There is a need for stable and reliable MVL device architectures compatible with scaled-down dimensions.

Purpose of the Study:

  • To demonstrate a novel method for achieving multithreshold voltage (multi-VTH) transistors using a single p-type organic semiconductor.
  • To overcome the limitations of conventional heterojunction-based MVL devices by enhancing stability and simplifying fabrication.
  • To explore the potential of coplanar self-assembled monolayer (SAM) modification for creating multiple VTH values within a single device channel.

Main Methods:

  • Utilized coplanar self-assembled monolayer (SAM) modification on a single p-type organic semiconductor.
  • Investigated the effect of SAMs on local surface potential transitions at the monolayer-organic semiconductor interface.
  • Optimized SAM combinations and channel width ratios for ternary inverter configurations.

Main Results:

  • Successfully achieved multithreshold voltage (multi-VTH) transistors using a single p-type OSC and coplanar SAMs.
  • Demonstrated the formation of multiple VTH values within a single active channel due to locally induced surface potential transitions.
  • Realized well-balanced intermediate logic states in ternary inverters through optimized SAMs and channel width ratios.

Conclusions:

  • Coplanar SAM modification offers a viable strategy for realizing stable and reliable MVL transistors with a single p-type OSC.
  • This approach circumvents complex alignment issues inherent in heterojunctions, making it suitable for scalable device fabrication.
  • The developed technique provides a pathway towards enhanced information processing density in the post-Moore era.