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Threshold Switching Behavior and Underlying Mechanisms in Pure SiO2-Based Selectors.

Hye Rim Kim1, Tae Jung Ha2, Jeong Hwan Song2

  • 1Department of Materials Science and Chemical Engineering, Hanyang University, Ansan 15588, Republic of Korea.

ACS Applied Materials & Interfaces
|March 18, 2026
PubMed
Summary
This summary is machine-generated.

We developed a novel pure silicon dioxide (SiO2) selector for crossbar memory. This device exhibits stable threshold switching (TS) over 10^9 cycles, promising improved memory integration.

Keywords:
CMOS compatibilitySiO2-based switching devicescharged oxygen vacanciescrossbar arraysselectorsthreshold switching

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Semiconductor Physics

Background:

  • Selector devices are vital for suppressing sneak-path currents in high-density crossbar array memory.
  • Conventional selectors often rely on complex materials like chalcogenides or metal oxides.

Purpose of the Study:

  • To propose and demonstrate a pure silicon dioxide (SiO2)-based selector for crossbar memory applications.
  • To elucidate the fundamental mechanisms behind the threshold switching behavior in SiO2 selectors.

Main Methods:

  • Fabrication of SiO2 selectors using conventional semiconductor processes.
  • Experimental characterization of threshold switching (TS) behavior, including endurance testing.
  • Interface structure analysis and controlled pulse-based electrical characterization.

Main Results:

  • Demonstrated stable TS characteristics with endurance exceeding 10^9 cycles.
  • Identified oxygen vacancy formation, structural asymmetry, and dynamic charging as key TS mechanisms.
  • Optimized pulse conditions for reliable TS operation were established.

Conclusions:

  • The pure SiO2 selector offers a simple, CMOS-compatible alternative to conventional selectors.
  • Low-temperature fabrication (<300 °C) and tunable threshold voltage enable excellent integration with advanced memory devices.
  • This work presents a promising pathway for highly integrated, silicon-compatible memory selectors.