Patterning of Lead Halide Perovskite Device Stacks on CMOS Readout Using Selective Microfabrication Protocols

Area of Science:

• Materials Science
• Semiconductor Physics
• Nanotechnology

Background:

• Lead halide perovskites offer unique optoelectronic properties for advanced devices.
• Standard microfabrication is challenging due to perovskite sensitivity.
• Precise patterning is crucial for applications like CMOS image sensors.

Purpose of the Study:

• To develop perovskite-specific patterning processes compatible with standard cleanroom fabrication.
• To enable the integration of lead halide perovskites into high-performance semiconductor devices.
• To overcome fabrication challenges for perovskite-based optoelectronics.

Main Methods:

• Surface passivation using sorbitan laurate to protect perovskite grain boundaries.
• Modified phosphoric acid etchant with PBABr for selective TCO etching.
• SF6 plasma treatment for perovskite conversion in interpixel gaps.

Main Results:

• Developed a surface passivation technique allowing standard photoresists and developers.
• Achieved selective etching of TCOs (e.g., ITO) without degrading the perovskite layer.
• Successfully fabricated a 400x400 pixel perovskite CMOS image sensor using the integrated strategy.

Conclusions:

• Established a pathway for standard microfabrication of lead halide perovskites.
• Demonstrated the feasibility of high-performance perovskite optoelectronic devices.
• Enabled precise pixel definition essential for high spatial resolution sensors.