Ternary quantitative neural network implemented with tri-valued memristors.

Area of Science:

• * Materials Science and Engineering
• * Computer Engineering
• * Artificial Intelligence

Background:

• * Memristors are CMOS-compatible, non-volatile devices suitable for in-memory computing and accelerating neural networks.
• * Existing memristor neural networks use continuous-type (difficult to control) or binary (limited accuracy) memristors.
• * Tri-valued memristors offer three resistance states, balancing hardware feasibility and weight representation capacity.

Purpose of the Study:

• * To propose a novel ternary neural network design scheme utilizing tri-valued memristors.
• * To develop a practical, all-hardware implementation for lightweight neural circuits.
• * To enhance the performance and feasibility of memristor-based neural network computing.

Main Methods:

• * Design of a fully hardware-based forward computing circuit using a tri-valued memristor crossbar array.
• * Development of a tri-valued memristance-based weight setting method and a weight updating algorithm for ternary quantized neural networks.
• * Integration of an activation function circuit and a winner-take-all (WTA) circuit.

Main Results:

• * Successful recognition of test characters ('z', 'v', 'n') via LTSpice circuit simulations.
• * Extension to the LeNet-5 network on the MemTorch platform.
• * Achieved 98.47% recognition accuracy on the MNIST benchmark test.

Conclusions:

• * The proposed tri-valued memristor design offers a practical and efficient solution for all-hardware neural network implementation.
• * This approach overcomes limitations of continuous and binary memristors, enabling better weight representation and hardware feasibility.
• * The design facilitates lightweight, high-performance neural circuit applications.