Accelerating spiking neural networks with photonic reconfigurable devices

Area of Science:

• Neuroscience
• Computer Engineering
• Photonics

Background:

• Conventional spiking neural networks (SNNs) face hardware limitations, leading to low array utilization and underperformance compared to GPU-based artificial neural networks (ANNs) in vision tasks.
• Existing architectures struggle with efficiency and scalability for complex visual processing.

Purpose of the Study:

• To introduce a programmable spiking neurocomputing architecture that overcomes hardware limitations of current SNNs.
• To enhance computational efficiency and bridge the performance gap between SNNs and ANNs for visual information processing.

Main Methods:

• Utilized CMOS-compatible photonic reconfigurable devices to unify synaptic and neuronal functions.
• Implemented optical isolation to suppress inter-cell crosstalk and enable independent programmability.
• Integrated photonic and electronic components into a scalable hardware framework.

Main Results:

• Achieved 1176x latency reduction and 239x energy savings on spiking Visual Geometry Group networks.
• Maintained equivalent recognition accuracy compared to conventional architectures in static and dynamic vision tasks.
• Demonstrated maximized array utilization for accelerated SNN computation.

Conclusions:

• The proposed photonic-electronic architecture offers a scalable solution for efficient and precise SNN acceleration.
• This approach significantly enhances SNN performance, making them competitive with state-of-the-art ANNs for complex visual tasks.
• The unified photonic components provide a robust framework for future SNN hardware development.