Novel single stage multipath 8 × 8 interconnection network/switching element (SSMIN/E) architecture.

Area of Science:

• Computer Science
• Electrical Engineering
• High-Performance Computing

Background:

• Efficient interconnection networks are crucial for high-speed parallel computing performance.
• Traditional 8x8 switching elements (SEs) lack path redundancy, creating single points of failure and reducing system reliability.
• Existing Gamma networks offer scalability but are limited by single-path constraints within their SEs.

Purpose of the Study:

• To propose a novel 8x8 full crossbar switching element (SE) with intrinsic path redundancy.
• To enhance fault tolerance and reliability in interconnection networks for parallel computing systems.
• To address the single-path limitation of traditional SEs and existing network structures.

Main Methods:

• Designed a Single Stage Multipath Interconnection Network/Element (SSMIN/E) using four 3x3 SEs.
• Implemented the 3x3 SEs with multiplexers and demultiplexers to create dual parallel paths.
• Compared the reliability of the 8x8 SSMIN/E architecture with traditional shuffle exchange networks (SEN) and Gamma networks.

Main Results:

• The proposed 8x8 SSMIN/E provides two parallel paths between each source-destination pair.
• The new architecture demonstrates improved fault tolerance without increased routing complexity.
• Comparative analysis shows the SSMIN/E offers enhanced reliability and reduced path length over SEN and Gamma networks.

Conclusions:

• The novel 8x8 SSMIN/E architecture effectively incorporates structural redundancy for improved fault tolerance.
• The developed switching element overcomes the single-path limitation of traditional designs.
• The SSMIN/E presents a promising solution for reliable, fault-tolerant interconnects in high-performance computing applications.