Harnessing the full potential of RRAMs through scalable and distributed in-memory computing with integrated error...

Area of Science:

• Computer Science
• Electrical Engineering
• Materials Science

Background:

• Global computing demand is rapidly increasing, straining conventional architectures due to high energy consumption and data movement costs.
• In-memory computing with Resistive Random Access Memory (RRAM) offers a solution by integrating memory and processing, but faces challenges with device non-idealities and scalability.

Purpose of the Study:

• To introduce MELISO+, a full-stack, distributed framework for energy-efficient in-memory computing.
• To address device non-idealities and enable large-scale matrix computations beyond 65,000 x 65,000 dimensions.

Main Methods:

• Development of a novel two-tier error correction mechanism to mitigate RRAM device non-idealities.
• Creation of a distributed RRAM computing framework for large-scale matrix operations.

Main Results:

• Reduction of first- and second-order arithmetic errors by over 90% due to device non-idealities.
• Enhancement of energy efficiency by three to five orders of magnitude and a 100-fold decrease in latency.
• Demonstration that lower-precision RRAM devices can outperform high-precision alternatives in accuracy, energy, and latency.

Conclusions:

• MELISO+ advances sustainable, high-dimensional computing through algorithm-hardware co-design and scalable architecture.
• The framework is suitable for demanding applications such as large language models and generative artificial intelligence.
• This approach significantly improves the viability of in-memory computing for future high-performance computing needs.