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Machine learning enabled unique chip feature extraction approach for semicustom delay variant PUF.

B Muthu Nisha¹, J Selvakumar², Soumyaranjan Routray¹

¹Department of ECE, SRM Institute of Science and Technology, Chennai, 603203, India.

Scientific Reports

|April 28, 2026

Summary

This study introduces a novel hardware fingerprinting method using a lightweight PUF, enhancing hardware security system reliability. The Semicustom Delay Variant PUF (SDV PUF) offers unique and unclonable security features.

Keywords:

Hardware security MMMC Static D-flip flop Static timing analysis Unique fingerprint

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Area of Science:

Electrical Engineering
Computer Science
Cybersecurity

Background:

Hardware security systems require unique and unclonable identifiers.
Existing Physical Unclonable Functions (PUFs) often rely on Configurable Ring Oscillators (CROs), which can have limitations.

Purpose of the Study:

To propose a lightweight PUF using a static D flip-flop-based delay counter for enhanced hardware security.
To create unique and unclonable hardware fingerprints for increased system reliability.

Main Methods:

Simulated and synthesized a novel delay unit using three CMOS technologies to analyze process variations.
Ensured circuit reliability through Multi-Mode Multi-Corner (MMMC) analysis and Static Timing Analysis (STA).
Evaluated randomness strength using Machine Learning techniques and the NIST statistical test suite.

Main Results:

The proposed Semicustom Delay Variant PUF (SDV PUF) demonstrated stable operation across wide temperature (0-125°C) and voltage (1.62-1.98V) ranges.
Achieved +0.004 ps slack timing and resolved 155 unique data paths, confirming design uniqueness.
Machine Learning and NIST tests validated the proposed structure's randomness strength.

Conclusions:

The developed SDV PUF offers a reliable and secure hardware fingerprinting solution.
The method provides specific advantages over existing approaches and meets security requirements for strong or weak PUF classification.