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Top-Gated Monolayer MoS2 Transistors on Growth Substrate by One-Step Integration of High-κ Dielectrics and
Boxin Wang1,2, Hua Yu3, Chenxu Wang1,2
1Beijing National Laboratory for Condensed Matter Physics and Institute of Physics, Chinese Academy of Sciences, Beijing 100190, China.
Abstract:
Fabricating top-gated transistors of 2D semiconductors directly on growth substrates holds promise for unlocking their full potential, yet faces challenges in integrating dielectrics and high-quality contacts. Here, we report top-gated monolayer MoS2 (ML-MoS2) transistors directly on sapphire growth substrate via plug-and-probe one-step integration of high-κ dielectrics and low-resistance bilayer contacts. Leveraging ML-MoS2 grown on high-step-density sapphire, contact electrodes, high-κ dielectrics, and gate electrodes are predeposited sequentially. The entire stack is then transferred onto another as-grown ML-MoS2, yielding top-gated transistors with atomically clean, sharp interfaces. Notably, the strong metal-MoS2 interfacial interaction drives transfer of the underlying ML-MoS2 with electrodes, forming low-resistance bilayer contacts. The resulting top-gated ML-MoS2 transistors show superior performance, including low contact resistance of ∼1.6 kΩ·μm, high on/off ratio of ∼108, mobility of ∼42.9 cm2·V-1·s-1, and on-state current of ∼22.4 μA/μm. Furthermore, functional logic gates (inverters, NOR and NAND gates) are constructed, verifying the feasibility of this plug-and-probe approach.
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