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GeneTEK: Low-power and high-performance FPGA scalable architecture for exact unit-cost edit distance
Elena Espinosa1, Rubén Rodríguez Álvarez2, José Miranda3
1Dept. of Computer Architecture, University of Malaga, Malaga, Spain.
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The advent of next-generation sequencing (NGS) has revolutionized genomic research by enabling cost-effective, high-throughput sequencing of a diverse range of organisms. This breakthrough has unleashed a "Cambrian explosion" in genomic data volume and diversity. This volume of workloads places genomics among the top four big data challenges anticipated for this decade. In this context, pairwise sequence alignment represents a very time- and energy-intensive step in common bioinformatics pipelines. Speeding up these computations requires the implementation of heuristic approaches, optimized algorithms, and/or hardware acceleration. Among the metrics used in sequence comparison, edit distance is an adopted measure of sequence similarity. Although state-of-the-art CPU and GPU implementations have demonstrated significant performance gains, recent FPGA implementations have shown improved energy efficiency. However, the latter often suffer from limited read-length scalability due to constraints on hardware resources, with some reported designs supporting comparison matrices for sequences of only up to 227 nucleotides. In this work, we present a flexible FPGA-based accelerator template that implements Myers's algorithm to compute exact unit-cost edit-distance up to 1000 bp using high-level synthesis and a worker-based architecture. GeneTEK, a set of instances of this accelerator template in a Xilinx Zynq UltraScale+ FPGA, achieves up to 113% increase in execution speed and up to 111× reduction in energy consumption compared to leading CPU and GPU solutions, while fitting comparison matrices up to 13× larger than previous FPGA-based systolic-array solutions. By following a SW-HW co-design approach, GeneTEK implements efficient memory access and exploits parallelization at multiple levels. These results reaffirm the potential of FPGAs as an energy-efficient platform for computing the exact unit-cost edit distance used in sequence comparisons of read-lengths up to 1000 bp.

