Ferroelectric-to-paraelectric phase engineering for 2D layered ultra-high-κ dielectrics

The progress of 2D electronic devices urgently requires van der Waals (vdW) dielectric layers that combine high dielectric constant, ultralow leakage and atomically smooth interfaces. 2D ferroelectrics typically exhibit high dielectric constant due to ionic displacement-driven polarization, but their pronounced remnant polarization and hysteretic switching behavior induce non-volatile states that fundamentally conflict with digital electronics. Landau theory dictates a ferroelectric-paraelectric transition at Curie temperature (T _C); spontaneous polarization persists below T _C, while the high-symmetry paraelectric phase above T _C enforces zero polarization, thus inherently eliminating the remnant polarization and hysteresis. Here, we transform common 2D ferroelectric CuInP₂S₆ into robust vdW dielectrics at room temperature by cationic substitution at Cu sites. The ferroelectricity is suppressed by disrupting long-range dipolar order, exhibiting hysteresis-free paraelectric behavior and preserving structural integrity and high dielectric constant. Centimeter-scale single crystals (Cu_{1- x} M' _x InP₂S₆, 0.05 ≤ x ≤ 0.4) are exfoliable into atomically flat nanoflakes. The paraelectric Cu_0.8Ag_0.2InP₂S₆ exhibits a record-high dielectric constant (κ ∼ 108) among vdW layered dielectrics, maintaining a low leakage current (∼10^-12 A) and a breakdown field of ∼2.6 MV/cm. These dielectrics form trap-free vdW interfaces with few-layer MoS₂, enabling transistors with 0.5 V operation, 10⁸ ON/OFF ratio and 62 mV/dec subthreshold swing.